The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2003
Filed:
Jul. 26, 2002
Gregory Jay DelMain, Maple Grove, MN (US);
John Gord, Venice, CA (US);
Lawrence J. Karr, Santa Monica, CA (US);
Paul De Rocco, Pacific Palisades, CA (US);
Glenn A. DeMichele, Lincolnshire, IL (US);
Douglas Kerns, Sierra Madre, CA (US);
Andrew Barber, Los Angeles, CA (US);
Alfred E. Mann Foundation for Scientific Research, Valencia, CA (US);
Abstract
An apparatus and method for forming a RAM data memory that generates predictable noise/interference components that are coherent with each write cycle and essentially independent of the data content of the RAM data memory. The RAM data memory is comprised of a plurality of cells, each representing a data bit, which are selectively addressable as memory bytes formed of multiple bits. Each cell is formed of two sets of cross-coupled transistors. By causing each set of cross-coupled transistors to be set to a common voltage level at the beginning of a write cycle before setting one set of transistors to a low level and the one set of transistors to be set to a high level (thus representing a desired data bit value), the associated noise/interference components of the power drain are data independent. Furthermore, the data-independent noise occurs at frequencies at or above the write cycle rate.