Table look-up operation for simd processors with interleaved memory systems

Abstract

An apparatus and method for accessing data in a processing system are described. The system includes multiple processing elements for executing program instructions. The processing system can be a single instruction stream, multiple data stream (SIMD) system, and the processing elements can be the multiple data paths of the SIMD system. Each processing element or data path is associated with an identifying value which distinguishes it from the other elements. A memory, which can be configured as an interleaved memory including multiple memory banks, stores data accessed by the processing elements. The data can be a table used for table look-ups for such functions as mathematical operations. Also, multiple copies of the table can be stored in multiple respective banks of the memory. An instruction calling for a memory access such as a table look-up is received. The instruction contains address information which can be a starting address of a table in memory. Each processing element generates an address for performing the memory access by combining at least a portion of its identifying value with the address information in the instruction. The generated address is then used to perform the access. Because the address used for the access depends on the processing element performing the access, the number of simultaneous accesses to a single memory address can be controlled and predicted.