The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2003

Filed:

Oct. 24, 2001
Applicant:
Inventor:

Eric S Fetzer, Longmont, CO (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 ;
U.S. Cl.
CPC ...
G11C 5/14 ;
Abstract

A circuit for reducing power in SRAMS and DRAMS is implemented by dynamically controlling a voltage applied to Nwells containing PFETs used in memory cells. When a memory cell is in standby, the voltage applied to Nwells containing PFETs is increased in order to reduce leakage current. When a memory cell is being written, read, or refreshed, the voltage applied to Nwells containing PFETs is reduced in order to allow the memory cell to switch more quickly.


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