The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2003
Filed:
Oct. 08, 2002
Applicant:
Inventor:
Kiyoto Watabe, Tokyo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
H03B 1/00 ;
U.S. Cl.
CPC ...
H03B 1/00 ;
Abstract
A dummy circuit ( ) is basically configured in the same manner as level shift circuits ( ), but an HVNMOS ( ) of the dummy circuit is always set at a non-conducting state. A mask circuit ( ) removes noise in signals (S , S ) outputted from the level shift circuits ( ), respectively, using a signal (S ) outputted from the dummy circuit ( ). Control signals (S , S ) include iterative pulses that are transmitted to S and R inputs of an RS flip-flop ( ). PMOSs ( ) bring current paths ( ) into a non-conducting state in response to an output signal (S ) from the RS flip-flop ( ) to thereby suspend one of the level shift circuits ( ).