The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2003

Filed:

Apr. 02, 2002
Applicant:
Inventors:

William R. Goyette, San Marcos, CA (US);

Karl D. Peterschmidt, Carlsbad, CA (US);

Trung H. Lam, San Diego, CA (US);

Assignee:

Northrop Grumman Corporation, Los Angeles, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 7/42 ;
U.S. Cl.
CPC ...
H03H 7/42 ;
Abstract

A circuit layout for a lumped element dual-balun ( ) where the elements of the dual-balun ( ) are patterned on a monolithic substrate ( ) in a compact design. The dual-balun ( ) includes four inductors ( ) and four capacitors ( ) electrically coupled together to provide two zero phase RF output signals and two 180° phase RF output signals. The inductors ( ) are symmetrically disposed in a rectangular area on the substrate ( ). A first pair of the inductors ( ) is positioned at one end of the rectangular area, and a second pair of the inductors ( ) is positioned at an opposite end of the rectangular area. The capacitors ( ) are formed on the monolithic substrate ( ) in a central circuit area ( ) between the first pair ( ) and the second pair of inductors ( ). RF output lines ( ) are coupled to circuit elements in the circuit area ( ) and extend out of the circuit area ( ) between the first a pair and the second pair of the inductors ( ).


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