The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2003
Filed:
Oct. 30, 2000
Naoaki Naka, Kawasaki, JP;
Junko Nakamoto, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
In the level converter circuit, when input signal is L level, a first NMOS transistor and a first PMOS transistor P are turned on by a first power supply potential, a second power supply potential is output to a first output terminal, a second NMOS transistor is turned on, and thereby, a reference potential VSS is output to a second output terminal. On the other hand, when the input signal is H level, a third NMOS transistor is turned on, the reference potential is output to the first output terminal, a fourth NMOS transistor and a second PMOS transistor are turned on, and thereby, the first power supply potential VDH is output to the second output terminal.