The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2003

Filed:

Oct. 30, 2001
Applicant:
Inventors:

Masahiro Toeda, Tokyo, JP;

Kazunari Takasugi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/712 ; H01L 3/1119 ; H01L 2/900 ; H01L 2/329 ;
U.S. Cl.
CPC ...
H01L 2/712 ; H01L 3/1119 ; H01L 2/900 ; H01L 2/329 ;
Abstract

A semiconductor device in which the potential of a conductive support substrate can be kept to be a predetermined potential, while an SOI substrate is used as a chip substrate, without adding a new step and providing a rear electrode, is provided. In a chip, on the main surface of a first Si substrate of a P-type, a SiO film and a second Si substrate of a P-type are laminated in this order. The chip has, in the second Si substrate, isolation trenches, an outermost isolation trench, a plurality of element forming regions isolated by these trenches, second element forming regions, a peripheral region, and a peripheral region connection wiring which connects a contact region of the peripheral region with a contact region connected with a predetermined potential, for example, a ground potential in the second element forming region surrounded by, for example, the isolation trench.


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