The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2003

Filed:

Aug. 16, 2001
Applicant:
Inventors:

Hubert Allen Vander Plas, Palo Alto, CA (US);

Barry Craig Snyder, Bend, OR (US);

Ron Allen Hellekson, Eugene, OR (US);

Alfred I-Tsung Pan, Sunnyvale, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B41J 2/01 ;
U.S. Cl.
CPC ...
B41J 2/01 ;
Abstract

An apparatus incorporating multiple electrical interconnects extending through a substrate (e.g., a silicon wafer), and a method of forming the same. The electrical interconnects convey electrical signals through the substrate to structures mounted on the front side of the substrate. A conductive layer can be used to selectively distribute the electrical signals to the structures. Accordingly, it is not necessary to route electrical signals to the front side of the substrate in order to convey the signals to the structures. A structure can be coupled to multiple electrical interconnects in order to convey electrical signals along redundant paths through the substrate to the structure, improving reliability should one of the electrical interconnects fail.


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