The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2003

Filed:

May. 30, 2002
Applicant:
Inventors:

Dirk Fischer, Paderborn, DE;

Lothar Fannasch, Bielefeld, DE;

Assignee:

ORGA Kartensysteme GmbH, PaderBorn, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06K 1/906 ;
U.S. Cl.
CPC ...
G06K 1/906 ;
Abstract

Disclosed is a method for producing a chip card which is provided with a plastic card body ( ) comprising several layers, an integrated circuit that is arranged in a chip module ( ) and at least two additional electronic components ( ) for producing an interactive chip card. The components and the chip module are connected to each other by means of strip conductors ( ) which are arranged on a carrier layer ( ) and metallic contact surfaces ( ) which are connected to the conductors. According to the invention, several cover layers ( ) are mounted on the conductor carrier layer. Said cover layers are provided with recesses ( ′) corresponding to the metallic contact surfaces ( ). The individual card layers of the plastic card body ( ) are laminated and as a result the metallic contact surfaces ( ) are pushed upwards within the recesses ( ′) of the cover layers ( ) to a point where said contact surfaces rest on a cover layer ( ) or a thickness compensation layer ( ), whereby said recesses are arranged above the contact surfaces. Three-dimensional conductor carrier layers ( ) can be easily produced by means of the inventive method in such a way that electronic components of different thicknesses can be introduced into the chip card body without entailing problems.


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