The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2003

Filed:

Oct. 18, 2000
Applicant:
Inventor:

Francis Michael Bartucca, Raleigh, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/314 ;
U.S. Cl.
CPC ...
G06F 1/314 ;
Abstract

The present invention provides an improved method and system for managing peripheral bus timeouts. The method includes: sending a request to a peripheral in a performance of a task; determining that a peripheral bus timeout occurred; sending an interrupt signal; retrying for an access to the peripheral; completing the request if the retry for the access to the peripheral is successful; and resuming the performance of the task. The present invention provides a software method in which an input/output (I/O) request to a peripheral is sent by a recoverable access routine. When a bus timeout occurs, a hung bus detector asserts an interrupt signal. The peripheral bus is freed from the hung condition. The recoverable access routine is suspended, and a bus timeout interrupt handler is then loaded. The interruption and the freeing of the peripheral bus frees the microprocessor from the processing of the I/O request so that other requests may be performed. During the suspension of the recoverable access routine, a retry routine retries the I/O request. If the retry routine is successful in completing the I/O request, the result of the request is provided to the recoverable access routine, and the recoverable access routine is resumed to complete the task. In this manner, a peripheral bus timeout is managed without the need to reset the device hardware.


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