The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2003
Filed:
Oct. 22, 2001
Magdy S. Abadir, Austin, TX (US);
Juhong Zhu, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A method of generating transition delay fault test patterns creates first and second circuit models of a received circuit model. The second circuit model is a replication of the first circuit model. Each latch of the first circuit model is identified. On a sequential basis until the entire circuit model is transformed, the data input of an identified latch in the first circuit model is disconnected and the data output of the corresponding latch in the second circuit model is disconnected. The driver of the data input of the latch in the first circuit model is connected to what was driven by the data output of the corresponding latch in the second circuit model to form a transformed circuit model. Stuck-at fault testing using conventional ATPG tools is performed on the transformed circuit model and the resulting test vectors are translated to generate transition fault test patterns for the original received circuit model.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile