The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2003

Filed:

Mar. 29, 2000
Applicant:
Inventor:

Timothy M. Lacey, Bedford, NH (US);

Assignee:

Cypress Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/04 ;
U.S. Cl.
CPC ...
G06F 1/04 ;
Abstract

A programmable logic device comprising a first circuit, a second circuit, and a third circuit. The first circuit may be configured to generate a first plurality of clock signals in response to (i) one or more input clock signals and (ii) a configuration signal. The second circuit may be configured to generate a second plurality of clock signals in response to (i) said first plurality of clock signals and (ii) said configuration signal. The third circuit may be configured to present a third plurality of clock signals selected from (i) said one or more input clock signals, (ii) said second plurality of clock signals in response to said configuration signal.


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