The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2003

Filed:

Mar. 22, 2002
Applicant:
Inventors:

Tsuneo Inaba, Kamakura, JP;

Fumihiro Kohno, Yokohama, JP;

Kenji Tsuchida, Kawasaki, JP;

Toshimi Ikeda, Yokohama, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

One (first level shift circuit) of first and second level shift circuits is provided in a local word-drive-line driving circuit located near memory cell arrays. The second level shift circuit is provided in a global word-drive-line driving circuit located remote from the memory cell arrays.


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Inaba, Tsuneo. (2003). Semiconductor memory device with reduced its chip area and power consumption (U.S. Patent No. 6650590). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6650590

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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