The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2003

Filed:

Aug. 15, 2002
Applicant:
Inventor:

Anthony Yap Wong, Cupertino, CA (US);

Assignee:

Pericom Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/22 ;
U.S. Cl.
CPC ...
H03K 5/22 ;
Abstract

A fail-safe circuit for a differential receiver can tolerate noise. A latch is enabled when both differential inputs V+, V− rise above a reference voltage that is close to Vcc. The latch, once enabled, is set by an offset amplifier, signaling the fail-safe condition. The offset amplifier sets the latch when V+ is above or equal to V−. The differential amplifier has a small offset voltage to allow the latch to remain set when V+ and V− are equal in voltage. An output from a differential amplifier receiving V+ and V− can be blocked by a gate when the fail-safe condition is latched. Pullup resistors pull V+, V− to Vcc when an open failure occurs. The latch remains set when common-mode noise occurs on V+, V−, preventing noise from prematurely disabling the fail-safe condition. Such noise coupled into a broken cable is usually common-mode.


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