The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2003

Filed:

Dec. 06, 2001
Applicant:
Inventors:

Yin-shang Liu, Nan Tou, TW;

Kuo-sheng Huang, Kao Hsiung, TW;

Hung-chih Liu, Hsin Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D 1/300 ;
U.S. Cl.
CPC ...
H03D 1/300 ;
Abstract

A digital frequency comparator includes two double-edge triggered flip-flops and a combination logic. Each of the double-edge triggered flip-flops includes two D-type flip-flops and two multiplexers. The first D-type flip-flop receives a first reference clock pulse and is triggered by a data signal. The second D-type flip-flop receives the first reference clock pulse and is triggered by the reverse of the data signal. The first multiplexer provides the output of the first D-type flip-flop when the data signal is 1 and the output of the second D-type flip-flop when the data signal is 0. The second multiplexer provides the output of the first D-type flip-flop when the data signal is 0 and the output of the second D-type flip-flop when the data signal is 1. The combination logic enables an UP pulse when the data signal transmission clock is faster in frequency than the first reference clock signal.


Find Patent Forward Citations

Loading…