The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2003

Filed:

Mar. 05, 2001
Applicant:
Inventors:

Timothy Patterson, Costa Mesa, CA (US);

Alex Lim Tiang Hock, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ; B23K 1/20 ;
U.S. Cl.
CPC ...
H01L 2/144 ; B23K 1/20 ;
Abstract

A method for manufacturing a chip assembly includes the steps of applying a controlled amount of flux to a plurality of solder balls on a die, applying a non-fluxing underfill material to a substrate, and assembling the die and substrate together to form the chip assembly such that the non-fluxing underfill material is trapped in between the die and the substrate. By applying the underfill material to the substrate before the chip is assembled rather than afterward, the inventive method increases chip assembly speed while maintaining control over flux application to prevent the solder balls from collapsing, eliminate the need for a defined solder resist window, and maintain a consistent die-to-substrate clearance at the solder joint.


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