The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2003
Filed:
Dec. 05, 2001
Applicant:
Inventors:
Alan J. Coppola, Portland, OR (US);
Joel Stanley, Urbana, IL (US);
Steven J. E. Wilton, Vancouver, CA;
Assignee:
Cypress Semiconductor Corp., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 7/38 ;
U.S. Cl.
CPC ...
H03K 7/38 ;
Abstract
A method and architecture for providing signal paths between a programmable logic core and a fixed function core comprising the steps of (a) coupling one or more first signals between the fixed function core and an interface block configured to couple the fixed function core and the programmable logic core and (b) coupling one or more second signals between the interface block and the programmable logic core.
Quick Actions:
Coppola, Alan. (2003). Interface scheme for connecting a fixed circuitry block to a programmable logic core (U.S. Patent No. 6646466). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6646466
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile