The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2003
Filed:
Apr. 19, 2002
Applicant:
Inventors:
Josef Willer, Riemerling, DE;
Christofer Hierold, Zürich, CH;
Assignee:
Infineon Technologies AG, Munich, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/708 ; H01L 2/976 ; H01L 2/994 ; H01L 3/1119 ;
U.S. Cl.
CPC ...
H01L 2/708 ; H01L 2/976 ; H01L 2/994 ; H01L 3/1119 ;
Abstract
A first capacitor electrode and at least part of a second capacitor electrode of a capacitor are produced in depressions of an auxiliary layer by electroplating. The auxiliary layer is then removed and at least partially replaced by a capacitor dielectric. The first capacitor electrode and the part of the second capacitor electrode may be composed of a metal, for example platinum. The capacitor dielectric can be composed, for example, of barium-strontium-titanate.
Willer, Josef. (2003). Integrated circuit configuration having at least two capacitors and method for manufacturing an integrated circuit configuration (U.S. Patent No. 6646299). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6646299
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile