The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6645819 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 11, 2003

Filed:

Oct. 19, 2001
Applicant:
Inventor:

Rajashekhar Pullela, Westlake Village, CA (US);

Assignee:

GTRAN, Inc., Newbury Park, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18222 ;
U.S. Cl.
CPC ...
H01L 2/18222 ;
Abstract

One embodiment of the present invention provides a method of fabricating a semiconductor device including the steps of forming a first semiconductor layer; forming a second semiconductor layer over the first semiconductor layer; forming a mask over a first portion the second semiconductor layer; removing a second portion of the second semiconductor layer not covered by the mask; forming a first electrical connector on the first semiconductor layer; and forming a second electrical connector on the first portion of the second semiconductor layer.


Find Patent Forward Citations

Pullela, Rajashekhar. (2003). Self-aligned fabrication method for a semiconductor device (U.S. Patent No. 6645819). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6645819

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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