The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2003
Filed:
Mar. 13, 2001
Jan-Willem Van De Waerdt, Sunnyvale, CA (US);
Paul Stravers, Eindhoven, NL;
Koninklijke Philips Electronics N.V., Eindhoven, NL;
Abstract
A way prediction scheme for a partitioned cache is based on the contents of instructions that use indirect addressing to access data items in memory. The contents of indirect-address instructions are directly available for use, without a memory address computation, and a prediction scheme based on this directly available information is particularly well suited for a pipeline architecture. Indirect addressing instructions also provide a higher-level abstraction of memory accesses, and are likely to be more indicative of relationships among data items, as compared to the absolute address of the data items. In a preferred embodiment, the base register that is contained in the indirect address instruction provides an index to a way-prediction table for an n-way associative cache. Data items that are indirectly addressed using the same base register are likely to be related, and thus predicting a particular way in an n-way associative memory based on the base register of an indirect address instruction is likely to result in a cache-hit, thereby reducing the energy consumption associated with accessing all ways in the cache.