The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2003
Filed:
Aug. 18, 1999
Niteen Patkar, Sunnyvale, CA (US);
Ali Alasti, Los Altos, CA (US);
Don Van Dyke, Pleasanton, CA (US);
Korbin Van Dyke, Sunol, CA (US);
Shalesh Thusoo, Milpitas, CA (US);
Stephen C. Purcell, Mountain View, CA (US);
Govind Malalur, Fremont, CA (US);
ATI International SRL, Christchurch, BB;
Abstract
An integrated computing system includes at least one processor formed on a substrate, wherein the processor operates at a processor rate. The integrated computing system further includes a global bus that is coupled to the at least one processor and is formed on the substrate. The global bus supports transactions (e.g., data, operational instructions, and/or control signaling conveyances) at a rate that is equal to or greater than the processing rate. The integrated computing system further includes a device gateway and memory gateway that are operably coupled to the global bus and formed on the substrate. The device gateway provides an interface for at least one device (e.g., internal or external) to the global bus. The memory gateway provides an interface between the global bus and memory.