The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2003

Filed:

Feb. 18, 2000
Applicant:
Inventors:

Hisaya Sakamoto, Kawasaki, JP;

Tetsuya Kiyonaga, Kawasaki, JP;

Takashi Kurooka, Kawasaki, JP;

Akimitsu Miyazaki, Kawasaki, JP;

Nobuaki Sato, Yokohama, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 1/000 ; H04B 1/006 ;
U.S. Cl.
CPC ...
H04B 1/000 ; H04B 1/006 ;
Abstract

An APD bias circuit includes an APD, an equalizer amplifier receiving an output signal of the APD, and first, second and third resistors connected in series to the APD to which a bias voltage is applied therethrough. A bias control circuit is connected to a first node between the first and second resistors, and receives a current from the first node so that a voltage of the first node can be maintained at a constant level. A first capacitor is connected between a ground and a second node between the second and third resistors. A second capacitor is connected between the ground and a third node between the third resistor and the APD. A first time constant defined by the second resistor and the first capacitor is greater than a second time constant defined by the third resistor and the second capacitor.


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