The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2003

Filed:

Mar. 22, 2002
Applicant:
Inventors:

Majid Ghameshlu, Vienna, AT;

Karlheinz Krause, Planegg, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 ; H03K 3/00 ;
U.S. Cl.
CPC ...
G06F 1/04 ; H03K 3/00 ;
Abstract

An integrated circuit having at least two clock systems in which the appropriate clock signal, starting from a clock input, can be forwarded through clock trees to individual switching elements or switching blocks. In this arrangement, each clock tree has an associated controlled switch which, for selected operating states, can be used to apply a single common clock signal to the clock trees, where at least a first clock tree has a PLL unit connected upstream of it, and an output of this clock tree is connected to an input of the PLL unit in order to form a phase locked loop, and the switches are actuated in selected operating states such that the common clock signal is supplied to a last clock tree, and an output of this clock tree is connected to the other input of the PLL unit for the at least first clock tree.


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