The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2003
Filed:
Dec. 21, 2000
Elimination of narrow device width effects in complementary metal oxide semiconductor (cmos) devices
Frederick T. Brady, San Antonio, TX (US);
Jon Maimon, Manassas, VA (US);
BAE Systems Information and Electronic Systems Integration, Inc., Nashua, NH (US);
Abstract
Neutral conductivity ions, preferably germanium, are implanted through the oxide of a metal oxide semiconductor after isolation formation to provide a nearly constant threshold voltage for transistor operation independent of transistor channel width as device geometries are scaled down in size. The present invention sets forth a method for fabricating a metal oxide semiconductor (MOS) structure that controls threshold voltage V in the structure, the method including generating an isolation region of the semiconductor structure on a major surface of a silicon substrate, growing a thin oxide on the major surface of the semiconductor structure, implanting a large diameter neutral conductivity type ion into the major surface of the semiconductor structure through the thin oxide, annealing the semiconductor structure having the neutral conductivity ion implanted therein, and processing the semiconductor structure to create MOS devices having a near constant threshold voltage over a range of device channel widths.