The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2003
Filed:
May. 17, 2002
Byung-jun Park, Suwon, KR;
Yoo-sang Hwang, Yongin, KR;
Samsung Electronics Co., Ltd., Kyungki-do, KR;
Abstract
A method of fabricating a DRAM semiconductor device including forming gate stacks in which a gate pattern and a gate sacrificial mask are sequentially deposited on a semiconductor substrate, forming an etch stopper on the semiconductor substrate, forming a lightly doped impurity region between the gate stacks, forming a gate spacer along sidewalls of the gate stacks, forming a heavily doped impurity region to contact the lightly doped impurity region and to be aligned with the gate spacer, removing the gate spacer, forming an interlevel dielectric layer to fill a gap between the gate stacks, forming a groove on a gate conductive layer by etching an exposed top surface of the etch stopper and the gate sacrificial mask, forming a contact mask pattern for filling the groove, forming a contact hole to be self-aligned with respect to the contact mask pattern, and forming a contact pad in the contact hole.