The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2003

Filed:

Mar. 13, 2002
Applicant:
Inventors:

Naoaki Naka, Kawasaki, JP;

Junko Nakamoto, Kawasaki, JP;

Yanyan Qiao, Hino, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 ;
U.S. Cl.
CPC ...
H03F 3/45 ;
Abstract

An amplification circuit of the present invention includes a first MOS transistor having a gate to which a first input terminal for inputting a positive logic input signal or a reference potential is connected and a drain to which a first load is connected, a second MOS transistor having a gate to which a second input terminal for inputting a negative logic input signal, which composes differential input signals with the positive logic signal, or the reference potential is connected and a drain to which an output terminal and a second load are connected, and pairing up with the first MOS transistor, and a current source to which sources of the first and second MOS transistors are connected, for supplying a constant current when the difference in voltage between the first and second input terminals is in a predetermined range, and varying the current to be supplied when the difference in voltage is beyond the predetermined range.


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