The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2003
Filed:
Dec. 07, 2001
Jean-Marie Boudry, Beynes, FR;
Bull S.A., Louveciennes, FR;
Abstract
An edge multiplier circuit comprises a chain of N phase-looped delay cells ( ). An order of cells to be delayed is determined by action loops. A first action loop ( ) is utilized for values of j varying from 1 to N, each corresponding to a total delay equal to j times an elementary delay (T ) of a cell. The delay is applied to the chain of N delay cells. An action of the first loop comprises a second action loop ( ) for values of i varying from 1 to N, each corresponding to a rank of a cell in said chain. An action of the second loop calculates a delay error (a (j, i)) output from the cell of rank i relative to an ideal delay that distributes the total delay of the chain equally to each cell. A first value of the error is calculated prior to activating an additional elementary delay (T ) of the cell of rank i and a second value of the error is calculated if the first value is higher than a predetermined threshold, after activating an additional elementary delay of said cell of rank i. The rank i in this case completes the order to be determined.