The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2003

Filed:

Dec. 08, 2000
Applicant:
Inventor:

Wing Jong Mar, Rohnert Park, CA (US);

Assignee:

Agilent Technologies, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B 2/100 ;
U.S. Cl.
CPC ...
H03B 2/100 ;
Abstract

A frequency synthesizer that includes an output oscillator, a difference circuit, a reference circuit, a feedback circuit and a comparator. The output oscillator generates an output signal whose frequency, F , is determined by an oscillator input signal. The difference circuit generates a sampled signal having a frequency, F =F −F . The reference circuit generates a reference signal having a frequency F . The reference circuit includes a reference oscillator for generating a high frequency reference oscillator output signal having a frequency F and a first division circuit for generating a signal having a frequency equal to F divided by R. The feedback circuit generates a feedback signal having a frequency, F . The feedback signal generating circuit includes a second division circuit having a division factor chosen such that F /F is minimized. The comparator compares the reference signal and the feedback signal and generates the oscillator input signal. One of the first and second division circuits is a Fractional-N Divider having a division factor, N.F, greater than 10. If the second division circuit is the Fractional-N Divider, the feedback circuit includes a multiplication circuit for generating a multiplied signal having a frequency equal to X times F , and the Fractional-N Divider generates the feedback signal from the multiplied signal. In the preferred embodiment of the present invention, the first division circuit is the Fractional-N Divider. In one embodiment of the invention, the input to the Fractional N Divider varies over time thereby causing the output oscillator to sweep through a corresponding frequency range.


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