The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2003
Filed:
Sep. 14, 1999
Applicant:
Inventors:
John Xiaoxiong Zhong, Fremont, CA (US);
Dian Yang, Sunnyvale, CA (US);
Zheng Zhou, San Jose, CA (US);
Ting Wang, Fremont, CA (US);
Assignee:
Innologic Systems, Inc., San Jose, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/45 ;
U.S. Cl.
CPC ...
G06F 9/45 ;
Abstract
A method and apparatus for performing design verification is described. In one embodiment, a method for performing design verification includes specifying at least one object that represents at least one signal as a symbol in a design using a first command and instructing a symbolic simulator with the first command to treat the at least one object as a symbol.
Zhong, John. (2003). Design verification by symbolic simulation using a native hardware description language (U.S. Patent No. 6634012). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6634012
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile