The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2003
Filed:
Dec. 19, 2000
Kent Aaron Ponton, Palm Bay, FL (US);
James Winthrop Swonger, Palm Bay, FL (US);
Intersil Americas Inc., Milpitis, CA (US);
Abstract
A clamping MOS transistor-based overvoltage protection circuit is provided for a bidirectional transmission gate FET coupled between input and output ports. When the voltage applied to the input port exceeds the supply voltage by a MOS gate threshold, the clamping MOS transistor is turned on, pulling the voltage applied to the gate of the transmission gate FET very close to the applied overvoltage level by a voltage differential less than a diode drop. This reduction in Vgs of the transmission gate FET reduces its source-to-drain current, as the device operates deeper in a sub-threshold region, increasing the overvoltage rating for the same leakage current specification. In a second embodiment, a clamping MOS device is coupled on either side of the source-drain path of the transmission gate's FET device.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile