The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2003
Filed:
Sep. 05, 2001
Applicant:
Inventors:
Larry Pileggi, Pittsburgh, PA (US);
Herman Schmit, Pittsbugh, PA (US);
Assignee:
Carnegie Mellon University, Pittsburgh, PA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 7/38 ;
U.S. Cl.
CPC ...
H03K 7/38 ;
Abstract
A method is comprised of translating a bit stream defining the state of switches of an FPGA into a set of via geometries, or generating the set of via geometries directly from a physical design system. The via geometries are used to produce at least one via mask. The via mask is then used in a manufacturing process to customize an array of fixed and/or programmable logic blocks.