Semiconductor integrated circuit and method for testing the same

Abstract

A test enable signal Data_En is output from a data generator in a tester to a device under a test (DUT) . In the DUT , a first logic circuit converts a signal pattern with an ordinary transfer rate, which has been stored on a register , into a high-transfer-rate signal pattern SpeedData_Tx with a high rate. And a transmitter transmits the high-transfer-rate signal. During a test, the high-transfer-rate signal transmitted is received by, a receiver with a switch turned ON. Then, the high-transfer-rate signal received is output to a second logic circuit , which converts the high-transfer-rate signal into a low-transfer-rate signal Data_Rx with an ordinary rate. Finally, the low-transfer-rate signal is output to the tester and compared to an expected value thereof by a comparator . In this manner, a semiconductor device operating at a high speed can be tested using a tester operating at a lower speed.