The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2003

Filed:

Aug. 14, 2001
Applicant:
Inventor:
Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 ;
U.S. Cl.
CPC ...
H03M 1/12 ;
Abstract

An auto-zeroed quantizer that has a unit delay characteristic employs switched capacitor techniques to adjust the input common-mode voltage to a proper common-mode voltage for the quantizer. A feed-forward auto-zero scheme is used to initialize the apparatus during an initialization phase. After the initialization phase, a differential input signal is amplified to provide a differential amplified signal. A positive feedback circuit is subsequently activated to increase the difference in the differential amplified signal until the difference saturates at a logic level. The logic level decision is stored in a memory circuit such as a latch. The unit delay quantizer may be utilized in a converter circuit such as a &Dgr;&Sgr; modulator.


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Stegers, Marc Gerardus Maria. (2003). Low voltage, unit delay quantizer with feedforward auto-zero mechanism (U.S. Patent No. 6630898). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6630898

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