Method of fabricating a dynamic random access memory device having stacked capacitor memory cell arrays

Abstract

A method of forming stacked capacitors over first field effect transistors having been provided in a memory cell area of a semiconductor memory device and at least a second field effect transistor in a peripheral circuit area of the semiconductor memory device. A first insulation film is entirely formed which extends over first gate electrodes of the first field effect transistors and within first apertures defined between the first gate electrodes as well as a second gate electrode of the second field effect transistor. A first inter-layer insulator is entirely formed which extends over the first insulation film. A surface of the first inter-layer insulator is planarized. A first contact hole is formed in the first insulation film. A first conductive film is entirely formed over the first planarized surface of the first inter-layer insulator and within the first contact hole. The first conductive film is subjected to a first anisotropic etching to selectively remove part of the first conductive film which extends only over the first planarized surface of the first inter-layer insulator except both in the vicinity of and within the first contact hole to pattern stacked capacitor storage electrodes in the memory cell array area, wherein the first inter-layer insulator protects the first insulation film from the first anisotropic etching. A stacked capacitor insulation film and a second conductive film are formed and patterned to form stacked capacitors. Selective removal is made of the first inter-layer insulator extending only in the peripheral circuit area by a wet etching with use of a first photo-resist film provided over the stacked capacitors in the memory cell array area to thereby show the first insulation film only in the peripheral circuit area. The first insulation film only in the peripheral circuit area is subjected to an etch-back by use of a second photo-resist film provided over the stacked capacitors in the memory cell array area so that the first insulation film remains only on opposite side walls of the second gate electrode of the second field effect transistor to thereby form side wall oxide films at the opposite side walls of the second gate electrode.