Single clock cycle crc engine

Abstract

A communication device, such as a cable modem, having a programmable media access controller (MAC) supported by a programmable CRC engine. The CRC engine computes CRC values for data written to it by the programmable MAC or other software process, thereby relieving processing circuitry of these computationally burdensome functions. The programmable nature of the CRC engine permits compliance with a wide variety standards, including evolving standards such as DOCSIS, without requiring expensive hardware upgrades. In one embodiment of the invention, the CRC engine may be initialized by the programmable MAC with an initial vector prior to CRC computations. The programmable MAC or other software then locates the data bytes (e.g., data frame header data) for which a CRC is to be computed. This information is written to a data register of the CRC engine and a CRC operation is performed. Based on the results, the programmable MAC may determine whether the CRC operation indicates valid data. For example, the CRC value may be compared to value communicating a frame header for purposes of validating received data frames. The CRC engine may advantageously utilize one or more polynomials as determined by the programmable MAC. Further, the CRC engine of the disclosed embodiment may receive data of varying sizes such that write processes may be optimized.