The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2003

Filed:

Jan. 04, 2000
Applicant:
Inventors:

Brian D. Falardeau, Boulder, CO (US);

David W. Nuechterlein, Longmont, CO (US);

Christopher M. Herring, Longmont, CO (US);

Jonathan B. White, Fort Collins, CO (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 ;
U.S. Cl.
CPC ...
G06F 9/455 ;
Abstract

There is disclosed an apparatus for providing a virtual PCI device for use in a processing system comprising a data processor having an external peripheral bus coupled thereto in which peripheral devices associated with the external peripheral bus are controlled by accessing configuration circuitry associated with each of the peripheral devices. The apparatus comprises: a) an address trap circuit for detecting a configuration cycle accessing a virtual configuration address space associated with the virtual PCI device and generating an enable signal in response and b) an interrupt generation circuit associated with the address trap circuit that receives the enable signal and, in response, generates an interrupt signal that causes the data processor to execute instructions stored in system memory associated with the virtual device.


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