The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2003

Filed:

Feb. 23, 2001
Applicant:
Inventor:

Douglas Sudjian, Santa Clara, CA (US);

Assignee:

Resonext Communications, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/9094 ;
U.S. Cl.
CPC ...
H03K 1/9094 ;
Abstract

A logic gate that includes a first differential amplifier and a feedback circuit. The first differential amplifier has a number of first (e.g., non-inverting) inputs and a second (e.g., inverting) input, receives and senses input signals applied to the non-inverting inputs, and provides a differential output that is a particular logic function (e.g., an 'OR') of the input signals. The non-inverting inputs may correspond to the gates of a number of transistors coupled in parallel to form an OR function. The feedback circuit detects the (e.g., non-inverting node of the) differential output and provides a control signal for the inverting input of the first differential amplifier. The logic gate typically further includes a second differential amplifier that senses and further drives the differential output.


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