The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2003
Filed:
Jun. 07, 2002
Applicant:
Inventors:
Assignee:
Sanyo Electric Co., Ltd., Osaka, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/362 ; H01L 2/933 ; H01L 2/906 ; H01L 3/10328 ; H01L 3/10336 ; H01L 3/1072 ; H01L 3/1109 ; H01L 2/13205 ; H01L 2/14763 ; H04B 1/44 ;
U.S. Cl.
CPC ...
H01L 2/362 ; H01L 2/933 ; H01L 2/906 ; H01L 3/10328 ; H01L 3/10336 ; H01L 3/1072 ; H01L 3/1109 ; H01L 2/13205 ; H01L 2/14763 ; H04B 1/44 ;
Abstract
A semiconductor switching device of mirror logic includes two FETs having a gate width of 600 &mgr;m, a common input terminal, two control terminal and two output terminals. The resistors connecting the control terminals and the gate electrodes of FETs are placed underneath a pad metal layer extending from the common input terminal. Both FETs extend into the space between the control terminals and the output terminals. The device can be housed in the same package as the device of non-mirror logic.