The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2003
Filed:
May. 01, 2000
Edward R. Helder, Fremont, CA (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
A system and method for maintaining lock of a phase locked loop within an integrated circuit during both a normal operation mode and a test mode, and during switching from the normal operation mode to the test mode, is disclosed. The method includes closing a phase locked loop feedback path of the phase locked loop with a real clock signal from a real clock tree during the normal operation mode. The real clock tree is selectively halted, thereby transitioning from the normal operation mode to the test mode. The phase locked loop feedback path of the phase locked loop is closed with a copy of a clock signal from a copy clock tree such that the phase locked loop maintains lock. The steps of halting the real clock and closing the phase locked loop feedback path with a copy clock signal are completed during a single clock cycle such that lock is maintained during switching from the normal operation to the test mode.