The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2003

Filed:

Dec. 21, 1999
Applicant:
Inventor:

Yong Wan Kim, Kumi-shi, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/1333 ;
U.S. Cl.
CPC ...
G02F 1/1333 ;
Abstract

A method of removing pattern defects in a liquid crystal display more particularly, a liquid crystal display having an IOP structure where a transparent conductive layer is formed on a passivation layer, removes pattern defects in active layers or data wires of an LCD simultaneously and quickly, without causing any damage on other parts of the LCD, by exposing pattern defects in the air, then carrying out an etching process in use of pixel electrodes and an etch-stop layer as an etch mask. The method of removing pattern defects in a liquid crystal display, wherein the liquid crystal display comprises a gate wire on a substrate wherein the gate wire includes a gate electrode and gate line, a gate insulating layer covering an exposed surface of the substrate including the gate wire, a data wire on the gate insulating layer wherein the data wire includes a data line, source electrode, and drain electrode, an active layer on the gate insulating layer wherein the active layer constitutes a thin film transistor with the gate, source, and drain electrodes which are properly overlapped one another, a passivation layer covering an exposed surface of the substrate except a portion of the data wire, and a pixel electrode on the passivation layer wherein the pixel electrode is connected to the exposed data wire, includes the steps of forming an etch-stop layer covering the data wire and thin film transistor, exposing at least one pattern defect by etching the passivation layer in use of the etch-stop layer and pixel electrode as an etch mask, removing the pattern defect, and removing the etch-stop layer.


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