The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6621727 B1

PDF
Full Text
Expired
Date of Patent:
Sep. 16, 2003

Filed:

Jan. 04, 2002
Applicant:
Inventor:

Kuo-Tso Chen, Daan Chiu, Taipei, TW;

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 1/100 ;
U.S. Cl.
CPC ...
G11C 1/100 ;
Abstract

A three-transistor SRAM device are disclosed. The SRAM device has an NMOS with its source connected to a first voltage source and its substrate connected to a second voltage source. The source of the NMOS is connected either a constant voltage source or a variable voltage source. An PMOS and the NMOS form a common node A. The drain of the NPMOS is connected to the source of the PMOS to form a common node B. A resister is connected between the nodes A and B. Another NMOS is connected between the node B and a bit line. The gate of this NMOS is controlled by a word line. A capacitor type amplifier may be further connected to the node B to form the data latch of the SRAM.


Find Patent Forward Citations

Chen, Kuo-Tso. (2003). Three-transistor sram device (U.S. Patent No. 6621727). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6621727

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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