The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2003

Filed:

May. 04, 2001
Applicant:
Inventors:

Todd A. Randazzo, Colorado Springs, CO (US);

Matthew J. Russell, Burnsville, MN (US);

Kenneth S. Szajda, Holliston, MA (US);

Jonathan A. Schmitt, Eden Prairie, MN (US);

Kenneth G. Richardson, Erie, CO (US);

Timothy P. McGonagle, Fort Collins, CO (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/900 ;
U.S. Cl.
CPC ...
H03K 1/900 ;
Abstract

An integrated circuit having input output buffers, where the integrated circuit is powered by at least a core power supply and an input output power supply. A level shifter receives an active low signal that indicates that the core power supply has powered down. The level shifter then outputs a known state upon receipt of the active low signal. A control circuit receives the known state form the level shifter, and then tristates the input output buffers upon receipt of the known state.


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