The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2003

Filed:

Mar. 29, 2000
Applicant:
Inventor:

Tsunehiko Yatsu, Tatebayashi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 3/126 ;
U.S. Cl.
CPC ...
G01R 3/126 ;
Abstract

The pad arrangement of a semiconductor chip allows simultaneous testing of a plurality of semiconductor chips. A plurality of semiconductor chips are arranged on a wafer, each including a plurality of signal input/output pads arranged along four sides for inputting/outputting a signal to/from a semiconductor device, and a measurement pad arranged along opposing two of the four sides, and electrically connected to the plurality of signal input/output pads arranged along the other two opposing sides. Such arrangement enables simultaneous testing of a plurality of semiconductor chips.


Find Patent Forward Citations

Yatsu, Tsunehiko. (2003). Semiconductor chip having a pad arrangement that allows for simultaneous testing of a plurality of semiconductor chips (U.S. Patent No. 6621285). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6621285

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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