The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2003
Filed:
Jul. 09, 2002
Il-Goo Kim, Seongnam-si, KR;
Jae-Seung Hwang, Suwon-si, KR;
Samsung Electronics Co., Ltd., Kyungki-do, KR;
Abstract
A method of forming electric wiring using a dual damascene process wherein prevention of damage to a lower conductive pattern and low contact resistance may be achieved. A first insulation layer having a first trench filled with a conductive material is formed on a semiconductor substrate. A first etch stop layer, a second insulation layer and a third insulation layer are sequentially formed thereon. A capping layer is formed on the third insulation layer. A via hole is formed by selectively etching the capping layer, third insulation layer and second insulation layer. Then the capping layer is partially etched and a polymer layer is formed on the exposed first etch stop layer. A second trench is formed and the electric wiring is formed by filling a conductive material in a resulting structure. The polymer layer prevents damage to the conductive pattern by protecting the first etch stop layer.