The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2003
Filed:
Dec. 05, 2001
Stefan Buettner, Sindelfingen, DE;
Guenter Mayer, Stuttgart, DE;
Juergen Pille, Stuttgart, DE;
Dieter Wendel, Schoenaich, DE;
International Business Machines Corporation, Armonk, NY (US);
Abstract
The invention describes a high-performance static logic compatible multiport latch. The latch is controlled by at least a first and a second clock (CLK , CLK ), which consist of at least first and second data input ports ( ) with together at least three data inputs (DATA , . . . , DATA DATA , . . . , DATA ) and at least one data output (OUT). The first clock (CLK ) controls whether data (DATA , . . . , DATA ) applied to the first data input ports ( ) is stored in or clocked through the latch ( ), the second clock (CLK ) controls whether data (DATA , . . . , DATA ) applied to the second data input ports ( ) is stored in or clocked through the latch, and either the first clock (CLK ) or the second clock (CLK ) clocks data into the latch at the same time.