The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2003
Filed:
Jul. 24, 2002
Helmut Wurzer, Dresden, DE;
Infineon Technologies AG, Munich, DE;
Abstract
Integrated semiconductor circuits have MOS transistors whose gate electrodes are provided with dopings in order to set the electrical potential of the channel region by an altered work function of the electrons. Transistors in semiconductor circuits having both a memory region and a logic region are fabricated either with different dopings for pMOS and nMOS transistors in the logic region (dual work function) or with a common source/drain electode in the memory region (borderless contact). In the latter case, all the transistors of the semiconductor circuit receive the same gate doping. A method is proposed by which it is possible to realize dual work function and borderless contact on a semiconductor substrate simultaneously in a simple manner.