The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2003

Filed:

Nov. 15, 2000
Applicant:
Inventors:

Carl E. Lemonds, Austin, TX (US);

Alan Gatherer, Richardson, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/52 ;
U.S. Cl.
CPC ...
G06F 7/52 ;
Abstract

A multiplier ( ) is disclosed that includes an encoder ( ), a hierarchy of compressors ( and ), a bit detector ( ) and a switch ( ). The encoder ( ) is operable to receive a first and second encoder input. The compressors ( and ) are coupled to the encoder ( ). The compressors ( and ) are operable to receive a first number of inputs and to generate a second number of outputs, with the second number being less than the first number. The bit detector ( ) is operable to monitor the first encoder input to determine whether the first encoder input is in a reduced precision range ( ). The bit detector ( ) is also operable to deactivate a subset of the compressors ( and ) when the bit detector ( ) determines that the first encoder input is in the reduced precision range ( ). The switch ( ) is coupled to a specified one of the compressors ( ). The switch ( ) is operable to redirect the path of one of the outputs for the specified compressor ( ) such that the subset of the compressors ( and ) is removed from the path when the bit detector ( ) determines that the first encoder input is in the reduced precision range ( ).


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