Semiconductor memory device capable of adjusting the number of banks and method for adjusting the number of banks

Abstract

A semiconductor memory device, which is capable of adjusting the number of banks from 2N to N and thus increasing product production and repair efficiency, and a method thereof are provided. The semiconductor memory device includes a switching circuit, a control circuit, and a redundant circuit. The switching circuit selectively transmits a first address or a second address in response to a control signal. The control circuit selectively activates 2 banks in response to N− (where N is a natural number) bank selection addresses and the first address or selectively activates 2 banks in response to the N−1 bank selection addresses. The redundant circuit controls repair of the defective normal memory cells. Each of the 2 banks comprises one memory block. Each of the 2 banks comprises 2 memory blocks, each of which is selectively activated in response to the second address. It is preferable that the defective normal memory cells are repaired in an activated bank in response to an output signal of the redundant circuit.