The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2003

Filed:

Sep. 28, 2001
Applicant:
Inventors:

Noboru Akiyama, Hitachinaka, JP;

Minehiro Nemoto, Hitachi, JP;

Seigou Yukutake, Hitachinaka, JP;

Yasuyuki Kojima, Hitachi, JP;

Kazuyuki Kamegaki, Tamamura, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/302 ; H01L 2/328 ; H01L 2/216 ; H01L 2/334 ; H05K 7/02 ;
U.S. Cl.
CPC ...
H01L 2/302 ; H01L 2/328 ; H01L 2/216 ; H01L 2/334 ; H05K 7/02 ;
Abstract

Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on a plurality of semiconductor chips. A driver circuit for signal transmission or receiver circuit for signal receipt formed on the semiconductor chips are electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing the plurality of semiconductor chips to be received within either a single package or a single module. Using this arrangement, a semiconductor device is capable of achieving both dielectricity and size reduction.


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