The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2003
Filed:
Dec. 14, 2001
Abstract
A method of forming a CMOS type semiconductor device comprises forming a gate electrode pattern on a surface of a substrate in NMOS and PMOS regions, forming spacers on side walls of the gate electrode pattern in the NMOS and PMOS regions, and doping n and p-type impurities heavily to the surface of the substrate in the NMOS and PMOS regions, respectively. After doping the p and n-type impurities heavily, the spacers are removed. The method further includes doping the n and p-type impurities lightly to the surface of the substrate in the NMOS and PMOS regions on which the spacers are removed. Alternatively, the light impurity implantation can be carried out before forming the spacers. Also, the light impurity implantation can be carried out to the surface of the substrate in one of the NMOS and PMOS regions before forming the spacers and to the surface of the substrate in the other of the NMOS and PMOS regions after removing the spacers.